1. Field of the Invention
The present invention generally relates to image forming apparatus and, more particularly, to an image forming apparatus such as a digital copy machine or a digital printer that has a nonvolatile memory.
2. Description of the Related Art
In recent years, power-saving function is strongly required for image forming apparatuses from a viewpoint of environmental protection. In a conventional image forming apparatus using an electrophotographic process, the power consumption of a fixing part is dominant. A system, which realizes the power-saving function by maintaining a fixing part to a temperature lower than a temperature at the time of operation or interrupting power supply to the fixing part in a standby state, is widely used.
Recently, the power-saving technology has progressed further, and a system that interrupts power supply not only to the fixing part but the entire system or a large part of the system has been used. In this case, the power consumption at the time of standby becomes several watts or less, and an image forming apparatus having a very large power-saving effect can be achieved.
On the other hand, in consideration of convenience, a return time from a standby state is a very important element. That is, there are many cases where an image forming apparatus cannot be used immediately since the image forming apparatus is in the process of returning from a standby state, thereby deteriorating convenience very much.
In a case where the power-saving function in the standby state is achieved mainly by a temperature control of a fixing part, measures have been taken for an increase in efficiency of a heater, a formation of a thinner fixing roller and a reduction in the return time in association with other mechatronics parts. Consequently, the return time of a fixing part has been improved to the level of several minutes to the level of several seconds. On the other hand, generally in many cases, it takes several seconds to initialize a control part mainly containing a central processing unit (CPU).
In the case of the system which interrupts the power supply to the entire system or a large part of the system, if the return time is several minutes or several tens of seconds, the time of several seconds required for initialization is a negligibly short time with respect to the entire return time from a standby state. For this reason, there is no need to take the time required for initializing the control part into consideration.
However, in the recent image forming apparatus having the return time of a fixing part becoming the level of several seconds, several seconds required for initializing a control part influences greatly to the return time of the system.
It should be noted that, in the present specification, the term xe2x80x9cfixxe2x80x9d is used to represent an operation of fusing toner attached on a transfer sheet so as to securely bond the toner to the surface of the transfer sheet after cooling the fused toner. The fixing part may be referred to as a xe2x80x9cfuserxe2x80x9d in the field to which the present invention is related.
Hereafter, the initialization of the control part is explained.
FIG. 1 is a block diagram of a digital copy machine as a conventional image forming apparatus. Image data obtained by a read control part 1 is sent to a write control part 4 after image processing is applied by an image processing part (not shown in the figure) of a main control part 3. The write control part 4 controls a laser diode (not shown in the figure) based on the image data sent from the image processing part, and forms an electrostatic latent image in an electrophotography process part 5.
On the other hand, a toner image developed by the electrophotography process part 5 is transferred onto a transfer paper having been conveyed from a paper feed part (not shown in the figure). The toner image is fixed on the transfer paper by a fixing part (not shown in the figure) heated by a fixing heater 6, and a copy 7 is formed. The fixing heater 6 is controlled by the main control part 3, an IO control part 8 and a fixation control part 9 so that the fixing part is always maintained at a desired temperature during operation.
Additionally, in order to reduce the power consumption of the system at the time of standby, the fixing heater 6 is maintained at a temperature lower than that of operation, or the power supply to the fixing heater 6 is interrupted during the standby. Further, in the case of a system which interrupts the power supply to the entire system or a large part of the system, the power supply is interrupted not only to the fixing heater 6 but also to the main control part 3, the IO control part 8, and the fixation control part 9.
It should be noted that the digital copy machine shown in FIG. 1 is provided with, other than the above-mentioned parts, an operation part 10, an auto-document feeder (ADF) 11, a paper feed bank (BNK) 12, sensors 13, a clutch/solenoid (CLandSOL) 14 and a power source 15.
FIG. 2 is a block diagram of the main control part 3 and the IO control part 8 of the digital copy machine shown in FIG. 1. After a power is turned on, a central processing unit (CPU) 21 starts a series of operations upon cancellation of a reset signal generated by a reset integrated circuit (IC) 22 in accordance with a control program stored in a read only memory (ROM) 23. A random access memory (RAM) 24 is used as a work area of the control program. Adjustment data of the image forming apparatus, history of use, and the like are stored in a nonvolatile memory 25, and the stored data is used for maintenance. Since the CPU 21 has a general-purpose specification, the control program initializes the CPU 21 first after start of the operation. Additionally, since there are many cases where the contents of the RAM 24 are unfixed immediately after a power is turned on, the RAM 24 is initialized according to ALLxe2x80x9c0xe2x80x9d or ALLxe2x80x9c1xe2x80x9d write after the initialization of the CPU 21. Further, since a CPU peripheral ASIC 26 and a peripheral control ASIC 31 also have a general-purpose specifications, the CPU peripheral ASIC 26 and the peripheral control ASIC 31 are initialized after the initialization of the RAM 24.
Here, a description will be given of the peripheral control ASIC 31 in detail. The peripheral control ASIC 31 is mounted on a substrate different from a substrate on which the CPU 21 and the ROM 23 are mounted. For this reason, the peripheral control ASIC 31 is connected to an exclusive control bus separated from a CPU bus by the CPU peripheral ASIC 26 for the purpose of reduction in a load applied to buses.
The interfaces (I/F) of the I/O system, such as the ADF 11, the bank 12, the sensors 13, the clutch/solenoid 14, and the fixation control part 9, are mainly connected to the peripheral control ASIC 31. In order to make the general-purpose function of the peripheral control ASIC 31 correspond to the interfaces, it is necessary to perform an input setup, an output setup, and a serial communication setup.
FIG. 3 is a block diagram of the peripheral control ASIC 31. The peripheral control ASIC 31 comprises a functional block 41, a register block 423 and a CPU I/F 43. The functional block 41 realizes each function such as a PIO, a UART, or a timer. The register block 42 performs various settings and operation control to the functional block 41. The CPU I/F 43 is connected to control buses such as an address data bus or a data bus so as to perform an internal address decode and an access control to the register block 42.
A description will be given below of the PIO as an example. Normally, all terminals of the PIO are set as input control ports by the register block 42 and I/O terminals are in a Hi-Z state so that a-control signal to a load is not turned active due to an unexpected output at a time of reset and after cancellation of the reset. The control signal to a load, which is desired to be inactive at the time of reset and after the cancellation of the reset, can be inactive by pulling up or pulling down the I/O terminals.
The terminals to which an input load is connected are set as input terminals and the terminals to which an output load is connected are set as output terminals by setting the register block 42 by a CPU (not shown) through the CPU I/F 43 after cancellation of reset. Additionally, an initial value of an output, is set up so as to perform desired I/O operations.
Similar operations are sequentially performed with respect to the UART and the timer in the register block 42, and the initialization of the peripheral control ASIC 31 is completed. Further, in order to maintain safety, activation of a load such as the fixing heater 6 is started after the series of initializing operations are ended and confirmed that the there is no problem in the system operation. The fixing heater 6 is controlled so as to rapidly reach a desired setting temperature immediately after the activation. After the desired setting temperature is reached, the fixing heater 6 is controlled by monitoring temperature so as to be maintained at a constant temperature.
FIG. 4 is a time chart of a process from the series of initializing operations to the activation of the fixing heater 6. FIG. 5 is an illustration showing an example of time required for each operation shown in FIG. 4.
In FIG. 4, the process from the series of initializing operations to the activation of the fixing heater 6 is sequentially carried out based on the control program.
As shown in FIG. 5, the return time of the system is 54.1 seconds when the return time of the fixing heater 6 is short, and is 9.1 seconds when the return time of the fixing heater 6 is short. Here, a consideration is made of a rate of contribution of the initialization time of the peripheral control ASIC 31 to the system reset time is considered. When the reset time of the fixing heater 6 is long (54.1 s), the rate of contribution is 1.8% as shown in FIG. 5, and it can be considered that the reset time of the fixing heater 6 is negligible.
However, when the reset time of the fixing heater 6 is short (9.1 s), the rate of contribution is 11.0%, which is not negligible. When attempting further reduction in the system return time, the rate of contribution may be a bottleneck, which is an obstacle in improving convenience for a user.
It should be noted that Japanese Laid-Open Patent Application No. 6-210923 discloses a recording apparatus which can save a time spent on an initializing process when a power is turned on. In the recording apparatus, memory check data is written in a nonvolatile memory so as to check validity of the data. The nonvolatile memory of the recording apparatus disclosed in Japanese Laid-Open Patent Application No. 6-210923 is used for merely retaining data, and is not used for generating control bus data.
It is a general object of the present invention to provide an improved and useful image forming apparatus in which the above-mentioned problems are eliminated.
A more specific object of the present invention is to provide an image forming apparatus which can reduce a system return time by reducing a time required for initialization of peripheral control integrated circuits according to a control program and achieves a low-power consumption so as to improve convenience for a user.
In order to achieve the above-mentioned objects, there is provided according to one aspect of the present invention an image forming apparatus using an electrophotographic process to form an image, comprising: a processing unit performing a control of the image forming apparatus; a control bus for address and data, which is controlled by the processing unit; a memory connected to the control bus and storing a control program of the processing unit; a reset part initializing the processing unit when a power is turned on; a peripheral control part controlling each part of the image forming apparatus in accordance with an instruction of the processing unit; and an exclusive control bus connected to the peripheral control part, wherein an operation of the exclusive control bus is started according to an input from the reset part so as to perform an initializing process of the peripheral control part.
According to the above-mentioned invention, the operation of the exclusive control bus connected to the peripheral control part is started according to the input from the reset part which initializes the processing unit when power is turned on. Therefore, the initialization of the peripheral control part is performed in parallel to the initialization of other parts. Thereby, the time spent on the initialization of the peripheral control part by a control program is omitted from the time spent on the entire initialization process.
In the image forming apparatus according to the present invention, the exclusive control bus may be produced based on control information stored in a nonvolatile memory. Additionally, the exclusive control bus may be selectively connected to one of the control bus controlled by the processing unit and another control bus produced based on the control information stored in the nonvolatile memory. The nonvolatile memory may be constituted by a ferroelectric random access memory.
Additionally, there is provided according to another aspect of the present invention an image forming apparatus, comprising a processing unit controlling the entire image forming apparatus and an integrated circuit controlling peripheral parts in accordance with an instruction of a main control part, wherein the integrated circuit comprises: a functional block performing a predetermined function; a register block storing setting data to the functional block; and a nonvolatile memory storing initial values of the setting data to the functional block separately from the register block.
According to the above-mentioned invention, the integrated circuit for peripheral control parts is provided with the nonvolatile memory which is separate from the register block and stores the initial values of the setting data to the functional block. Thereby, the initialization of the integrated circuit for peripheral control parts according to a control program can be performed in parallel to the initialization of other parts. Therefore, the time spent on the initialization of the integrated circuit for peripheral control parts can be omitted from the time of the entire initialization, and the reset time of the system can be reduced.
The image forming apparatus according to the above-mentioned invention may further comprise a selector selecting one of the register block and the nonvolatile memory in accordance with an instruction supplied from the processing unit when a power is turned on, wherein the initial values of the setting data stored in the nonvolatile memory is are loaded to the register block. Additionally, the image forming apparatus may further comprise a selector control part controlling a selector which selects one of the register block and the nonvolatile memory to be accessed by the processing unit when an access is made from the processing unit to the integrated circuit, wherein the same address is given to the register block and the nonvolatile memory in the processing unit. The nonvolatile memory may be constituted by a ferroelectric random access memory.
Other objects, features and advantages of the present invention will become more apparent from the following detailed description when read in conjunction with the accompanying drawings.